The MACH Project in a nutshell
Leveraging advantage through high performance
Manufacturing still dominates the European economy and contributes more than €6.5 billion to EU GDP and provides more than 30 million jobs. High performance computing, HPC, is revolutionising the way products are designed and manufactured. So if Europe is to retain its leading position and competitive advantage, it will be crucial to leverage state-of-the-art HPC resources, especially on the embedded level, by integrating hardware and software power – this is what the MACH ITEA 2 project is about.
From diversity to optimisation
Until a couple of years ago, the evolution of HPC hardware, as well as embedded hardware architecture, was quite predictable. But with new hardware architectures and features hitting the market much earlier and more frequently, predicting which hardware architecture will be the prevailing one is no easy task. Moreover, all those new hardware systems are complex and all but trivial to program, causing the effort to maintain existing and developing new software applications to grow at an exponential rate. At the same time the complexity of computing systems is increasing due to the integration of other hardware components like accelerators that allow some of the computational effort to be offloaded. Consequently, state-of-the-art HPC resources are increasingly dominated by these heterogeneous architectures that combine traditional CPU-based systems with accelerator boards that are often equipped with graphical processing units (GPUs). The diversity of hardware accelerators present in HPC and HPeC systems is growing substantially.
The objective of the MACH project is to provide compute-intensive application developers with a highly efficient programming framework for hybrid computing hardware composed of a mix of classical processors and hardware accelerators. MACH not only facilitates the development process of HPC applications but also, and more importantly, optimises the overall performance of these applications.
The project also supports the identification of the best HPC platform architectures for given compute-intensive applications, thereby enhancing the procurement of the most efficient platform configuration to run the respective application. Efficiency criteria include the performance, energy consumption and price of the platform.
The MACH project aims to target the following market segments that are partly traditional fields for HPC as well as new fields, especially, where embedded high performance computing is needed:
· Advanced driver assistance systems (ADAS) where the need to process real-time is increasing with the requirement for precision.
· Automatic image interpretation or video content analysis that is being adopted in a wide range of applications such as industrial automation, medical imaging, intelligent video surveillance and traffic management.
· The related domain of image processing that is faced with more data, higher resolutions, more complex algorithms and a transition of 2D to 3D.
· CFD calculations in various fields (such as aero-acoustics or environmental calculations) whereby multidisciplinary, multi-physics codes like CFD tools have to be integrated in the optimisation loop in order to accelerate efficient computer enabled processes requiring extensive computational power.
· The life science industry, where open source software is widespread in the genomics community but is hindered by its low performance when confronted with big data and where faster profiling and assembly workflows for genome analysis can only be achieved by a massive computational effort.
By bridging the gap between traditional high performance computing and the need for high performance computing in the world of embedded computing, the MACH project will enable HPC code developers to develop mission and performance critical applications independent of hardware constraints. The introduction of domain-specific embedded languages, optimising compilation frameworks, and libraries separates the concerns between domain algorithms and hardware-dependent implementation details.
In the short term we expect the application partners to benefit substantially from the leverage of improved performance of their codes on a multitude of hardware architectures not previously accessible.
In the medium term business partners outside the MACH consortium should be able to leverage the MACH infrastructure as Fraunhofer SCAI and FZI envision maintaining and further extending the platform for an even broader community.
For the longer term future is likely that we see a completely changed compute infrastructure, especially with respect to performance-critical applications. With the development of tremendous parallelism, with thousands of cores on a single computational device seeming possible, so long as the primarily targeted hosting languages C and C++ prevail, customers and partners employing MACH results will have a competitive advantage.
The MACH project heralds a new era of high performance computing – High Performance Extreme Computing – bridging the gap between traditional HPC and the high performance computing needed in the embedded computing world (HPeC). It will have a positive impact on the competitiveness of the companies involved, allowing them to unleash the power of their applications on almost any kind of modern computing system. Given the increase in data volumes and the algorithms’ complexity, performance is the key to competitiveness. For example, video and image-processing by itself or as an application in advanced driver assistance systems, radar image processing or medical image processing leverage similar algorithms and mathematical methods. MACH can help such applications achieve top performance.